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HMT microelectronics was built in 1978, coming out of the Swiss watch industry.
The first mission was in the ASIC field, HMT used to be one of the earliest design center in Europe.
The specialisation to analog and mixed developpement was started in 1987 in close relation to SGS-Thompson (ST) group. since 1991, HMT is an approved design center for ST technologies, and since 1994 for AMI Semiconductor (former alcatel Microelectronics)
In 1993, HMT joined the HiDensity group in order to propose small sized high sophisticated microelectronics modules for industrial applications as sensor, smart power or signal processing modules.
Until 1991, HMT put into places co-operations with PHILIPS, AMIS (Alcatel).
All developpements are done on modern CAD stations : Sun workstations, several PC's and a proof-concept tasks from the backbone of all developpements and enginnering work.
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ASIC |
FPGA
Used as digital breadover device and programmable function block for low volume production ( few 100 pcs/year). Low developpement cost, pre-charaterized digital cells, fast turn around, no industrialisation cost, high device cost |
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Gate Array
Used for low complex mixed signal and medium complex, digital design for low to medium volume production (from 10k to 300k pcs/year, depending on specification). low to medium developpement cost, precharaterized analog and digital cell library, fast turn around, industrialisation phase is required for mixed signal design, low to medium device cost. |
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Standard cell
Used for high complexity mixed signal and digital design for medium to high volume production (from several 10k to 1 Mio pcs/year). Medium to high developpement cost, pre-charaterized analog and digital cell library and mega-function blocks with the possibility to design user cells, medium turn around time, industrialization phase is required for mixed signal design based on similarity rule check and characterization cells, low device cost.
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Full custom
Used for low to high comlex mixed signal and digital designs for high volume production (more than 1 Mio/year). High developpement cost, pre-charaterized configurable device library to achieve the smallest die size. long turn around time, industrialization phase is required based on characterization of the circuit, lowest device cost. |
MEGACELLS and IP-Blocks |
| Memories |
Memories like RAM, ROM, EPROM are regular structures to be generated automatically for integration in standard cell or full custom ASIC. Thes memories have the same behavir than standard products but for the programming of ROM (see µController). |
| PLA |
Analog to Digital and vice versa converters for the implementation in standard cell or full custom ASIC resolution up to 17 bit. |
| µController |
E2PROM, Flash, OTP or metal mask prgrammable device or core cell for the implementation in standard cell or full custom ASIC. Integrated µControllers have the program code to be stored externally or as ROM code. |
| AD/DA Converters |
Analog to Digital and vice versa converters for the implementation in standard cell or full custom ASIC resolution up to 17 bit. For few bits, depending on conversion algorithm, solutions are also available in mixed signal gate array. |
| IP-Cores |
Intellectual Property Cores, available for most standard cell or full custom technologies. ost IP-cores covers pure digital functions like µControllers (ARM, 8051, 80186), DSP (Voice processing), Interfaces (SPI, PCI, PCMCIA, IEEE, SCSI, UART, USB etc.), busses (VAN, CAN etc.) telecom standards (Codec, ATM, Utopia, DMT, ISDN etc.). Few cores exists for analog blocks like AD and DA Converters, amplifiers, voltage regulators and LCD drivers. |
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Technical data |
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Data sheet (pdf file, 204Ko) |
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